Meet the Creators | Scaling Compute

Meet the R&D Creators

We're bringing together expertise across three critical technology domains (AI systems design, mixed-signal CMOS circuits, and advanced networking) and a strong institutional mix (spanning academia, non-profit R&D organisations, startups and multinational companies), to pull novel ideas to prototypes and into real-world applications.

1 | Charting the Course 2 | Advanced Networking and Interconnect 3 | New Computational Primitives

1 | Charting the Course

We’re funding two projects to develop software simulators to help the research community map the expected performance/power/cost for any future combination of algorithm, hardware, componentry, and system scale. The goal is to quantify the bottlenecks from different components in the stack, and enable agile adaptation to a fast-paced algorithms research community.

Active

Breaking Down the Compute Graph Step by Step: A scalable and modular simulation

Aaron Zhao, Imperial College London; Luo Mai, University of Edinburgh; Robert Mullins, University of Cambridge

Active

Heterogeneous Scale-Out Platform Simulator

James Myers, Imec

Previous funding calls in this programme

The projects we are funding have been selected from teams and individuals who applied to our previous funding calls for this programme. You can read more about these calls below.

Our Creators are driving towards one goal – dropping the hardware costs required to train large AI models by >1000x – but as AI hardware and techniques advance rapidly, our baseline metrics and the computational cost of MLPerf benchmark workloads shift, requiring a constant recalibration of our targets. Now, we're looking for a team who can help track these moving targets and publish their findings to the research community. Through this work, we'll create an accurate (and open) source of ground truth for programme targets, and ensure the ambitious technologies developed by our Creators are measured against the most up-to-date advances in the field.
This solicitation seeks to fund individuals and teams in a coordinated effort to redefine our current compute paradigm. If successful, this programme will unlock a new technological lever for next-generation AI hardware, alleviate dependence on leading-edge chip manufacturing, and open up new avenues to scale AI hardware.
Watch the solicitation presention Read the call for proposals

Scaling Inference Lab

In an expansion of the programme, we are committing £50m to the creation of the Scaling Inference Lab: an open AI testbed designed to increase the ability of startups and other innovation engines to test new compute technologies with the goal of rapid system-level deployment and cost reduction.

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